Hi,
I'm trying to understand the maximum (theoretical) memory bandwidth of Xeon processors so that our applications can maximize their bandwidth. I thought I had it figured out, but now I have a processor where I don't understand how the maximum numbers make sense.
Here's an example I think I understand: Xeon E5-2630 v3 (Haswell-EP). The maximum memory bandwidth (according to ARK) is 59 GB/s. It has 4 memory channels and supports up to DDR4-1866 DIMMs. The peak transfer rate of a DDR4-1866 DIMM is 14933 MB/s, and 14933 * 4 = 59732 MB/s, so this adds up.
What I don't understand: Xeon E7-4830 v3 (Haswell-EX). The maximum memory bandwidth is 102 GB/s. But it also supports up to DDR4-1866 and has 4 memory channels! So how does it get 102 GB/s? One theory is that the E7-4830 v3 has two memory controllers. While cpu-world confirms this, it also says that each controller has 2 memory channels, so it still doesn't add up.
I'd appreciate any help from the experts over here. Is the number of memory controllers documented by Intel anywhere? I couldn't find it.
Thanks in advance!